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  • 期刊論文
    出版年份著作著作人
    1991Chia-Chiung Tsai, S. J. Chen, Pei-Yung Hsiao, and Wu-Shiung Feng, "Routing Area Compaction Based on Iterative Construction" , Journal of the Chinese Inst. of Engineers , 14 , 3 , 1991, pp239-256 (SCI)蕭培墉
    1991Chia-Chun Tsai, S. J. Chen, Pei-Yung Hsiao, and Wu-Shiung Feng, "A New Iterative Construction Approach to Routing With Compacted Area" , IEE Proceedings-E Computers and Digital Techniques , 138 , 1 , 1991, pp57-71 (SCI)蕭培墉
    1991Pei-Yung Hsiao and Chia-Chun Tsai, "Expert Compactor: a Knowledge-Based Application in VLSI Layout Compaction" , IEE Proceedings-E Computers and Digital Techniques , 138 , 1 , 1991, pp13-20 (SCI)蕭培墉
    1990Pei-Yung Hsiao and Wu-Shiung Feng, "Using Multiple Storage Quad Tree on a Hierarchical VLSI Compaction Scheme" , IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems , 9 , 5 , 1990, pp522-536 (SCI)蕭培墉
    1990Pei-Yung Hsiao and Wu-Shiung Feng, "New Algorithms Based on Multiple Storage Quadtrees in Hierarchical Compaction of VLSI Mask Layout" , Int. J. of Computer-Aided Design , 22 , 2 , 1990, pp74-80 (SCI)蕭培墉
    1990Pei-Yung Hsiao, S. F. Steven Chen, and Wu-Shiung Feng, "A New Control Strategy for An A.I. Approach to VLSI Layout Compaction" , INTEGERATION, the VLSI journal , 10 , 1 , 1990, pp55-70 (SCI)蕭培墉
    1989Pei-Yung Hsiao, Wu-Shiung Feng and S. F. Steven Chen, "An Application of Expert System in Layout Compaction of VLSI Design" , Journal of the Chinese Inst. of Engineers , 12 , 4 , 1989, pp497-510 (SCI)蕭培墉
    1989Pei-Yung Hsiao and Wu-Shiung Feng, "Using Hierarchical M. S. Quad Tree on A Constraint-Graph Layout Compaction" , Journal of the Chinese Inst. of Engineers , 12 , 3 , 1989, pp301-315 (SCI)蕭培墉
     Wen-Teng Chang; Cheng-Ting Shih; Jhao-Lin Wu(吳昭霖); Shih-Wei Lin(林士瑋), and Wen-Kuan Yeh, "Performance Evaluation of UTBB FDSOI, FinFETs, and SOI FinFETs via Mechanical Stresses and Body Biasing" , IEEE Transactions on Nanotechnology , PP , 99 , 0000, pp1-1 (SCI)葉文冠
     Wen-Teng Chang; Cheng-Ting Shih; Jhao-Lin Wu(吳昭霖); Shih-Wei Lin(林士瑋), and Wen-Kuan Yeh, "Performance Evaluation of UTBB FDSOI, FinFETs, and SOI FinFETs via Mechanical Stresses and Body Biasing" , IEEE Transactions on Nanotechnology , PP , 99 , 0000, pp1-1 (SCI)葉文冠

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