A New Noise Margin and Average Static Power Model for Junctionless Double-gate FETs (JLDGFET) Working in Subthreshold Logic gate
- 年度:2016
- 論文類型:口頭報告
- 論文等級:其他
- 論文名稱(篇名):A New Noise Margin and Average Static Power Model for Junctionless Double-gate FETs (JLDGFET) Working in Subthreshold Logic gate
- 會議名稱:The 5th IEEE International Symposium on Next-Generation Electronics
- 會議開始時間:2016-05-04
- 會議結束時間:2016-05-06
- 作者中文名:江德光
- 作者英文名:Te-Kung Chiang
- 全部作者:Te-Kuang Chiang, Chen, Chih Yo(陳芷右), Hong-Wun Gao, and 2Yeong-Her Wang
- 著作人數:4
- 作者型態:Corresponding Author
- 會議地點:Hsinchu
- 使用語言:英文