計畫名稱：結合超穎結構之 D 頻帶濾波型功率分配/結合器設計
執行起迄：2018/08/01~2019/10/31
總核定金額：697,000元
中文摘要：本研究計畫採用TSMC 0.18-um 1P6M CMOS製程，設計四個具有帶通特性的濾波型功率分配器。設計I是一個60-GHz濾波型功率分配器，由三個四分之一波長共振腔搭配網狀彎折佈局所組成，每一個傳輸路徑都是2階帶通濾波器。此功率分配器已經製作並以on-wafer方式下探針量測，從58 GHz到64 GHz，量測的反射損耗均在10 dB以上。植入損耗在67 GHz的量測值為4.3 dB，其中已扣除3 dB功率分配。此功率分配器的隔離度量測值在60 GHz為16 dB，從40 GHz到67 GHz的振幅與相位不平衡度也分別在±0.5 dB和6°以內，量測數據和電磁全波模擬結果具有一致性。設計I電路面積為467 × 480 um2，不包含饋入線和焊墊。設計II和設計III採用雙模開環路共振腔來分別實現61 GHz和100 GHz的濾波型功率分配器，前者電路面積為338 × 660 um2，後者為338 × 660 um2。以設計II來說，其模擬的反射損耗從54 GHz到68 GHz均優於10 dB，通帶內植入損耗與隔離度模擬值分別優於3 dB和15 dB。以設計III來說，從91 GHz到106 GHz其模擬的反射損耗均優於10 dB，同樣頻率範圍內的植入損耗和隔離度模擬值分別優於4 dB和15 dB。設計IV則採用步階式阻抗共振腔實現90 GHz兩階濾波型功率分配器，其模擬結果顯示，此電路在78 GHz到102 GHz具有 > 10 dB的反射損耗，< 4 dB的植入損耗，以及> 15 dB的隔離度(77 GHz – 95 GHz)。設計IV的濾波型功率分配器佔據面積為195× 212 um2。
英文摘要：This project presents four filtering power dividers using TSMC 0.18-um 1P6M CMOS technology. The type-I circuit is a 60-GHz filtering power divider which consists of three net-type quarter-wavelength resonators. The three resonators form a two-pole bandpass filter for each transmission path. The power divider has been fabricated and measured using on-wafer probes. The measured return loss is larger than 10 dB from 58 GHz to 64 GHz. The measured insertion loss is 4.3 dB at 67 GHz, in which the 3-dB power division has been excluded. The power divider has a measured isolation of 16 dB at 60 GHz. The measured amplitude and phase imbalances between two paths are within ±0.5 dB and 6°, respectively, from 40 GHz to 67 GHz. Measured results are consistent with simulated data obtained by a full-wave simulator. The circuit occupies an area of 467 × 480 um2 without feeding lines and pads. The type-II and type-III designs utilize dual-mode open-loop resonators to form 61-GHz and 100-GHz filtering power dividers, respectively. The former occupies an area of 338 × 660 um2 and the latter occupies an area of 216 × 402 um2. For type-II circuit, the simulated return loss is better than 10 dB from 54 GHz to 68 GHz. The simulated in-band insertion loss and isolation are better than 3 dB and 15 dB, respectively. For type-III circuit, the simulated return loss is better than 10 dB from 91 GHz to 106 GHz. The simulated insertion loss and isolation are better than 4 dB and 15 dB, respectively, within the same frequency range. The type-IV circuit uses three stepped-impedance resonators to realize a 90-GHz two-pole filtering power divider. Simulated results show that the design has a return loss > 10 dB from 78 GHz to 102 GHz, an in-band insertion loss < 4 dB, and an isolation > 15 dB from 77 GHz to 95 GHz. The type-IV design has an area of 195× 212 um2.