計畫名稱：近場技術於系統構裝整合分析研究
執行起迄：2017/08/01~2018/07/31
總核定金額：767,000元
中文摘要：整合雙面直接針測及近場量測測試技術，發展系統電路層級之靜電放電路徑檢測與解決方案、系統電路同步切換雜訊頻域暨時域產生機制檢測應用，建立系統電路層級在靜電防護與高速同步切換雜訊上最佳化設計與解決方案。主要之研究項目有： 1.建立近場量測技術在靜電放電路徑量測之測試與模擬架構，優化系統構裝電路設計在靜電消散上之能力，並提出系統構裝層級電路在靜電防護上之設計準則與解決方案。 2.建立近場量測技術在高速數位電路同步切換雜訊量測之測試與模擬架構，系統構裝線路設計在訊號整合及電源供應整合上優化準則，並針對系統電路進行目前解決方案優化及新解決方案提出。
英文摘要：In this project, two major study items for Signal and Power Integrity are proposed depend on near field measurement technology and direct double-side probing measurement. Analysis solutions of Time-varying ESD dissipation path and simultaneous switch noise are proposed in this project for SiP and System circuit. Including: 1. Test and Simulation Architecture for Electrostatic Discharge Path Measurement by Near-field measurement technology will be developed. Optimize the ability of the SiP circuit to design the static dissipation capability, then, the design criteria and solutions of the ESD system are proposed. 2. Establishment of testing and simulation architecture of High-speed digital circuit simultaneous switching noise. Design guidelines and solutions for optimization of signal integrity and power supply integration performance of System in package. Then, provide current solution optimization and new solutions proposed.