102學年度:以非接觸式訊號傳遞技術實現積體電路構裝整合測試與三維雙面校正量測技術研究

計畫名稱:以非接觸式訊號傳遞技術實現積體電路構裝整合測試與三維雙面校正量測技術研究
執行起迄:2013/08/01~2014/07/31
總核定金額:748,000元
中文摘要:近年來產品體積越來越小、功能越來越多、速度越來越快,因此晶片逐漸往系統單晶片(System on Chip, SoC)、系統構裝(System in Package, SiP)與立體堆疊技術(3-Dimension Integrated Circuit, 3DIC)等方向發展,而在產品製作完成進入封裝測試階段時,往往會有EMI、EMC等問題產生,且傳統的接觸式探針會有成本高、易磨損、機動性低,以及下針的Pad限制晶片大小等問題。 本專題研究主要目的是設計一個低成本、低損壞率、高自由度的非接觸式共面波導探針,來解決上述接觸式量測所面臨之問題,利用訊號耦合量測待測物,並進行還原理論的公式推導,希望將來利用此非接觸式探針所量測之參數經過還原公式後,即可還原出待測物本身的特性,此外亦可藉由此探針建立待測物之輻射模型,有利於往後對晶片所產生的EMI、EMC進行分析,解決目前晶片輻射過高的問題。而由量測、模擬的比較結果可以明顯看出本專題研究所建立之模型以及還原理論在頻率10GHz前皆是相當準確,因此可以證實此還原理論的可行性及發展性。 本專題同時進行非接觸式訊號耦合之應用,將其應用在雙面量測校正技術上,研製發展寬頻寬、再現性佳、穿透損耗小且其能符合異針距與異模態探針之校正新式多埠雙面式校正治具,提出可直接量測系統構裝電路及高密度微細間距晶片堆疊之校正量測程序。
英文摘要:Recently, the 3C products increase the functionalities and the volume become smaller as well, so IC would be developed to SoC, SiP and 3DIC. But it is easily to produce EMI and EMC effect in the package and testing stage. And the traditional contacting probes have a lot of drawbacks such as high cost, low mobility and easily to wear. In this study, to solve the problems of contacting measurement, a broadband, high mobility and low cost CPW non-contact probe is proposed. It can measure the coupling signal from near-field. And we substitute the coupling signal into the signal reduction theorem to make the result be the same as original characteristics of DUT. In addition, it is helpful for analyze the EMI and EMC effect, and solving the problem of high radiation chips. However, the radiation model and the signal reduction theorem are extremely accurate before 10 GHz from the result. It can prove the reliable and feasibility for this study. The non-contact signal transmission theory can apply on double-side calibration technology. And the broadband, well reproducibility, low loss double-side calibration kit has been proposed in this study. It can make the measurement of stacking chips and chips on PCB become easier in the future.