Jump to the main content block
Your browser does not support JavaScript functionality. If the webpage function cannot be used properly, please enable the browser's JavaScript status
Menu
Burger Button
Home
NUK
Site map
繁體中文
Burger Button
Introduction
Overview
Department Logo
Transportation
Announcements
Latest News
Courses
Events
Admissions
Members
Faculty
Staff
Labs
Emeritus Faculty
STUDENT
Bachelor
Master
PhD
Downloads
Department Administration
Forms
Faculty Resources
Shared Research Facilities
Admission
Home
葉文冠/期刊論文
"Voltage-Controlled Multiple-Valued Logic Design Using Negative Differential Resistance Devices" , Solid-State Electronics , 54 , 12 , pp1637-1640 ,2010, (SCI)
出版日期
:2010-12-00
期刊等級
:SCI
論文名稱(篇名)
:Voltage-Controlled Multiple-Valued Logic Design Using Negative Differential Resistance Devices
期刊名
:Solid-State Electronics
卷數
:54
期數
:12
起頁
:1637
迄頁
:1640
總頁數
:4
作者中文名
:葉文冠
作者英文名
:Wen-Kuan Yeh
全部作者
:Kwang-Jow Gan, Cher-Shiung Tsai, Yan-Wun Chen, Wen-Kuan Yeh
著作人數
:4
作者型態
:Corresponding Author
使用語言
:英文
Click Num:
Print
Login Success
Close (Esc)
Share
Toggle fullscreen
Zoom in/out
Previous (arrow left)
Next (arrow right)