“Nanosheet FET: A New Subthreshold Current Model Caused by Interface-Trapped-Charge and Its Application for Evaluation of Subthreshold Logic Gate”, Microelectronics Journal, Vol. 104, No. 106, pp. 104983-104992, 2020.
T.K. Chiang, “Nanosheet FET: A New Subthreshold Current Model Caused by Interface-Trapped-Charge and Its Application for Evaluation of Subthreshold Logic Gate”, Microelectronics Journal, Vol. 104, No. 106, pp. 104983-104992, 2020.
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