江德光 / 期刊論文

日期	標題
2025-04-01	” A Novel Subthreshold Current and Threshold Voltage Model for the Ballistic Dual-Material-Gate Nano-Sheet MOSFET”, Micro and nanostructure, vol. 187, pp. 207761-207773, March, 2024.
2025-04-01	” A Novel Ballistic Model for the Subthreshold Behavior of Nanosheet Transistors”, Vol. 25, No. 32, May, Nanotechnology, 2024.
2025-04-01	” A Unified Semiconductor-Device-Physics-Based Ballistic Model for the Threshold Voltage of Modern Multiple-gate MOSFETs”, Electronic Materials. 2024, 5(4), 321-330
2024-02-17	"A Novel Subthreshold Current and Threshold Voltage Model for the Ballistic Dual-Material-Gate Nano-Sheet MOSFET”, Micro and Nanostructure, vol. 187, pp. 207761-207773, March, 2024
2022-06-10	"Junctionless Multiple-Gate (JLMG) MOSFETs: A Unified Subthreshold Current Model to Assess Noise Margin of Subthreshold Logic Gate” IEEE Trans. on Electron Device Vol. 65, No. 10, pp. 4535-4541, October, 2021.
2022-06-10	“Novel Omega-Gate Heterojunction Tunneling FETwith A New Analytical Model” Semiconductor science and technology, 2021
2022-06-10	“Elliptical Nanowire FET: Modeling the Short-Channel Subthreshold Current Caused by　Interface-trapped-Charge and Its Evaluation for Subthreshold Logic Gate”, Superlattics and microstructures Vol.6, No. 4, pp. 1083-1092, 2021.
2022-06-10	“Nanosheet FET: A New Subthreshold Current Model Caused by Interface-Trapped-Charge and Its Application for Evaluation of Subthreshold Logic Gate”, Microelectronics Journal, Vol. 104, No. 106, pp. 104983-104992, 2020.
2022-06-10	“An analytical model for merged GaN heterojunction barrier schottky diodes with inserting P-Si Technology” Superlattics and microstructures Vol. 10, No. 4, pp. 1043-1051, 2020.
2021-03-19	Chiang Te-Kuang*(江德光), ”Nanosheet FET: A New Subthreshold Current Model Caused by Interface-Trapped-Charge and Its Application for Evaluation of Subthreshold Logic Gate” Microelectronics Journal, Vol.104, No.106, pp.104983-104992, 2020.