“Elliptical Nanowire FET: Modeling the Short-Channel Subthreshold Current Caused by　Interface-trapped-Charge and Its Evaluation for Subthreshold Logic Gate”, Superlattics and microstructures Vol.6, No. 4, pp. 1083-1092, 2021.

T.K. Chiang “Elliptical Nanowire FET: Modeling the Short-Channel Subthreshold Current Caused by　Interface-trapped-Charge and Its Evaluation for Subthreshold Logic Gate”, Superlattics and microstructures Vol.6, No. 4, pp. 1083-1092, 2021.

瀏覽數:

友善列印

“Elliptical Nanowire FET: Modeling the Short-Channel Subthreshold Current Caused by Interface-trapped-Charge and Its Evaluation for Subthreshold Logic Gate”, Superlattics and microstructures Vol.6, No. 4, pp. 1083-1092, 2021.

“Elliptical Nanowire FET: Modeling the Short-Channel Subthreshold Current Caused by　Interface-trapped-Charge and Its Evaluation for Subthreshold Logic Gate”, Superlattics and microstructures Vol.6, No. 4, pp. 1083-1092, 2021.